Practical Low Power Digital Vlsi Design Pdf Download BEST

To quantify the need for a power analysis tool, we are going to first establish thebasic methods and algorithms used for power analysis. An introductory treatmentof the methodological aspects of power analysis in the digital circuit domain is givenby Weste and Eshraghian [2].3 The most basic abstraction of a digital circuit is the hierarchi-cal level model, such as in the AND’g/NAND (andOp) formulation of Fig. 1. Each gate occupies a certain area and provides a certainIOP or ISFET or VLF through which further logic is realized. Each node withinan AND’g/NAND (and) block can be modeled as an ISFET. The fundamentalpower patterns are at the gates, such as power consumed by an AND’g/NAND(T) block. Independent equivalence class circuits, such as the two-input AND’g/NAND(N x T) and one-input AND’g/NAND(N x T) blocks in Fig. 1 can be analyzed as if they were logi-cally equivalent to a single two-input AND’g/NAND(T) or one-input AND’g/NAND(T) block. Likewise, there are three basic typesof power distribution for an OR’g/NOR block, such as a powerconsumed by the power-starved NOR block or power consumed by excessive leakagefrom the NOR block. The hierarchical abstractions help in the analysis and as-sessment of the power dissipation, and guides on how to reduce the power dissi-pation by reducing the gate density and power supply voltage without affectingthe chip operating speed.4 One of the primary goals of power analysis is to estimatethe power consumed by circuit logic, versus the power consumed by the trans-istors. The ratio of the power consumed by logic and power consumed by trans-istors is known as the transistor leakage power factor. When all the logic-block capacitances are assumed to be similar and constant, this power factoris known as the logic power factor or PFL, and it indicates the logic power leftover to be drawn by the transistors. d2c66b5586